The present invention relates to arrays for performing logic functions and more particularly relates to a new decoder for PLAs.
It is well known to perform logic in an array of identical circuit elements each located at a unique intersection of an input and output line in a grid of input and output lines. Co-pending patent applications 537,219, filed on Dec. 30, 1974; 537,218, filed on Dec. 30, 1974, now U.S. Pat. No. 3,936,812; and 591,208 filed on June 27, 1975 and assigned to the same assignee as the present invention describe such a PLA in which a number of decoders feed inputs to a first array called a product term generator or an AND array which in turn supplies outputs to a second array called a sum of product term generator or an OR array. The input lines of these arrays each have input variables fed to either or both ends. When input variables are fed to both ends of an input line, the input line is segmented to separate logic functions performed on input variable fed to one end from logic functions performed on input variables fed to the other end. The input variables to the AND array are the outputs of two, two-bit decoders. Each two-bit decoder feeds one side of four input lines. This permits the four input lines to perform logic functions involving two sets of variables each made up of all the possible combinations of two binary input signals fed to the same side of the array. Co-pending patent application, Ser. No. 629,260, filed on even date herewith describes a decoder in which each four input lines are connected to four one-bit decoders at their opposite ends. The decoders and the input lines are interconnected so that each two input variables are presented at each end so they will perform the usual two-bit decoding onto the four input lines. However, connections between the decoders and input lines of the array can be broken to perform logic functions of single variables and of sets of variables made up of one input signal on either side of the array. While this is a considerable improvement in flexibility, it would be advantageous to perform logic functions of three, four or more variables in addition to the above mentioned combination of logic functions.